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FPGA Based System Design: Home

A field-programmable gate array (FPGA) is an integrated circuit designed to be configured by a customer or a designer after manufacturing – hence "field-programmable".

Course Description & Objectives

This is a project-oriented course . Based on the knowledge and training gained in ENEE245,students will further develop their skills by working on more challenging digital system design using Verilog hardware description language (HDL) in an industry-standard design environment.

Course Objective:To acquaint the students with the field of advance digital design based on a hardware description language, so that they are able to map computationally intensive algorithms in different engineering applications on FPGAs. The main Course Learning Outcomes (CLOs) of the subject, to be achieved by the end of the semester, are given below:

CLO1: To apply the concepts and constructs of Hardware Description Language (HDL) in order to implement combinational and sequential digital systems. (C3)

CLO2: To solve fixed point arithmetic operations involving different bit formats. (C3)

CLO3: To design Finite State Machines (FSM) in HDL in order to execute a practical design project. (C5)

CLO4: To develop FSM based code in VHDL language for implementing a basic UART module using Xilinx ISE software. (P4)



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Muhammad Arif Raza
Information Services Department
Riphah International University
G-7/4, Islamabad

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